This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-087546, filed Mar. 27, 2000, the entire contents of which are incorporated herein by reference.
The present invention relates to a semiconductor device having a three-dimensional capacitor such as a stack-type capacitor.
In recent years, as the packing density of elements on a semiconductor integrated circuit increases, the minimum dimensions which can be processed and the area of a memory cell are decreased more and more. Accordingly, the area of a capacitor in a memory cell has become very small.
As the memory cell becomes smaller, the capacitance (storage capacitance: Cs) also becomes smaller. However, to keep the sensitivity high and to prevent soft errors, the capacitance should not be so small.
In order to overcome this problem, two methods have been considered. One is to form a capacitor three-dimensionally, so that the surface area of the capacitor can be increased with cells of a small area, thereby increasing the capacitance of the capacitor. The other is to use a material of a high dielectric constant (so-called xe2x80x9chigh-k materialxe2x80x9d) as a material of the capacitor insulating film.
In the generation of a design rule of about 0.12 xcexcm (corresponding to the 1 G-bit DRAM generation), it has become difficult to form a storage node electrode (hereinafter referred to as an SN electrode) having a complex three-dimensional shape in the process of manufacturing a semiconductor device. Therefore, the aforementioned method of using a capacitor insulating film of a high-k material is very important to increase the capacitance.
Representative high-k materials are Ta2O5 (hereinafter abbreviated as TAO) and (Ba, Sr)TiO3 (hereinafter abbreviated as BST). Even if a capacitor insulating film of this kind of material is used, a three-dimensional capacitor should indispensably be introduced. A stack-type capacitor is known as one of the three-dimensional capacitors.
FIG. 1 shows a cross section of a DRAM employing a stack-type capacitor (stack-type DRAM). In FIG. 1, a reference numeral 101 denotes a silicon substrate, 102 an element isolating region, 103 a gate insulating film, 104 a gate electrode (word line), 105 a source/drain region, 106 an interlayer insulating film, 107 a bit line, 108 a plug (SN contact), 109 a barrier metal film (for example, a Ti/TiSi2 film), 110 a three-dimensional SN electrode, 111 a capacitor insulating film made of a high-k material (for example, a BST film), and 112 a plate electrode (hereinafter referred to as a PL electrode) serving as a common electrode.
After the three-dimensional capacitor having the SN electrode 110 and the capacitor insulating film 111 made of the high-k material is formed, a high-heat stress is generated in a region among the SN electrode 110, the capacitor insulating film 111 and the PL electrode 112 by a later process involving heat (a heat process). As a result, the adhesion between these elements 110 to 112 is reduced. In addition, a leak current of the capacitor is increased by the heat stress on the capacitor insulating film 111 or the storage capacitance of the capacitor is reduced. These problems are considered to be prominent particularly in the case where the SN electrode 110 is cylindrical or box-shaped, since in this case the side wall of the SN electrode 110 is thin.
As described above, the capacitor that comprises the conventional three-dimensional SN electrode structure, the capacitor insulating film made of a high-k material and the PL electrode serving as the common electrode has the following problems. Much heat-stress is generated in a region among the SN electrode, the capacitor insulating film and the PL electrode due to a heat process after formation of the capacitor. The heat stress results in reduction in the adhesion between these elements, increase in leak current or reduction in storage capacitance.
The present invention has been made in view of the above problems. An object is to provide a semiconductor device having a plurality of capacitors, in which a heat stress applied thereto in a later process can be reduced.
Representatives of the invention disclosed in the present application will be outlined below. To achieve the above object, according to a first aspect of the present invention, there is provided a semiconductor device comprising: a semiconductor substrate; and a plurality of capacitors formed on the semiconductor substrate and having a plurality of first electrodes, a capacitor insulating film and a second electrode, the capacitor insulating film being interposed between the plurality of first electrodes and the second electrode, wherein a cavity is present in at least one of the plurality of first electrodes or in the second electrode.
To achieve the above object, according to a second aspect of the present invention, there is provided a semiconductor device comprising: a semiconductor substrate; a plurality of storage node electrodes formed on the semiconductor substrate; a capacitor insulating film formed on the plurality of storage node electrodes; and a plate electrode formed on the capacitor insulating film and opposing to the plurality of storage node electrodes on the capacitor insulating film, and at least one cavity formed in the plate electrode.
To achieve the above object, according to a third aspect of the present invention, there is provided a semiconductor device comprising: a semiconductor substrate; a plurality of storage node electrodes formed on the semiconductor substrate and spaced apart from one another; a capacitor insulating film formed on upper surfaces and side surfaces of the plurality of storage node electrodes; and a plate electrode formed on the upper surfaces of the plurality of storage node electrodes and between adjacent storage node electrodes, a portion of the plate electrode between the adjacent storage node electrodes including a cavity, the capacitor insulating film being interposed between the plurality of storage node electrodes and the plate electrode.
With the semiconductor device having the above structure, the heat stress, which an electrode receives in a heat process, is reduced by the cavity in the electrode. Accordingly, the capacitor insulating film and the electrode receive less heat stress in the heat process. In other words, the heat stress received by the capacitor as a whole in the heat process after the capacitor forming process is effectively reduced.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.